Lattice Semiconductor
IP Core Generation
To use this project file in Diamond:
1. Choose File > Open > Project .
2. Browse to ?
< project_dir >\blk_vd_eval\< username >\impl\synplify (or precision) in the Open Project
dialog box.
3. Select and open < username >.ldf. At this point, all of the files needed to support top-level synthesis and imple-
mentation will be imported to the project.
4. Select the Process tab in the left-hand GUI window.
5. Implement the complete design via the standard Diamond GUI flow.
To use this project file in ispLEVER:
1. Choose File > Open Project.
2. Browse to ?
\< project_dir >\blk_vd_eval\< username >\impl\synplify (or precision) in the Open Project
dialog box.
3. Select and open < username >.syn. At this point, all of the files needed to support top-level synthesis and imple-
mentation will be imported to the project.
4. Select the device top-level entry in the left-hand GUI window.
5. Implement the complete design via the standard ispLEVER GUI flow.
Hardware Evaluation
The Block Viterbi Decoder IP supports Lattice’s IP hardware evaluation capability, which makes it possible to create
versions of the IP core that operate in hardware for a limited period of time (approximately four hours) without
requiring the purchase of an IP license. It may also be used to evaluate the core in hardware in user-defined
designs.
Enabling Hardware Evaluation in Diamond:
Choose Project > Active Strategy > Translate Design Settings . The hardware evaluation capability may be
enabled/disabled in the Strategy dialog box. It is enabled by default.
Enabling Hardware Evaluation in ispLEVER:
In the Processes for Current Source pane, right-click the Build Database process and choose Properties from the
dropdown menu. The hardware evaluation capability may be enabled/disabled in the Properties dialog box. It is
enabled by default.
Updating/Regenerating the IP Core
By regenerating an IP core with the IPexpress tool, you can modify any of its settings including: device type, design
entry method, and any of the options specific to the IP core. Regenerating can be done to modify an existing IP
core or to create a new but similar one.
Regenerating an IP Core in Diamond
To regenerate an IP core in Diamond:
1. In IPexpress, click the Regenerate button.
2. In the Regenerate view of IPexpress, choose the IPX source file of the module or IP you wish to regenerate.
IPUG32_02.7, June 2010
27
Block Viterbi Decoder User’s Guide
相关PDF资料
VTERB-DECO-XP-N1 IP CORE VITERBI DECODER XPGA
VTP110F POLYSWITCH PTC RESET 1.1A STRAP
VTP175LF POLYSWITCH PTC RESET 1.75A STRAP
VTP210GF POLYSWITCH PTC RESET 2.1A STRAP
VTP210SF POLYSWITCH PTC RESET 2.1A STRAP
W51-A121B1-10 CIRCUIT BREAKER THERM 10A ILLUM
W54-XC2A4B10-40 CIRCUIT BREAKER THERMAL 40AMP
WV-089047-10-9 LABEL ID PRODUCTS
相关代理商/技术参数
VTERB-BLK-XM-U4 功能描述:编码器、解码器、复用器和解复用器 Block Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTERB-DECO-O4-N1 功能描述:编码器、解码器、复用器和解复用器 Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTERB-DECO-XP-N1 功能描述:编码器、解码器、复用器和解复用器 Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTESALLANF-155.520000 功能描述:155.52MHz LVPECL VCXO Oscillator Surface Mount 3.3V 100mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:155.52MHz 功能:启用/禁用 输出:LVPECL 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源(最大值):100mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽(7.00mm x 5.00mm) 高度:0.075"(1.90mm) 封装/外壳:6-SMD,无引线(DFN,LCC) 电流 - 电源(禁用)(最大值):- 标准包装:200
VTESFP4G 制造商:Promise Technologies 功能描述:SP.VTRAK.4GB SFP OPTICAL TRANSCEIVER.BOX - Bulk
VTEUALJANF-122.880000 功能描述:122.88MHz CMOS VCXO Oscillator Surface Mount 3.3V 40mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:122.88MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源(最大值):40mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽(7.00mm x 5.00mm) 高度:0.075"(1.90mm) 封装/外壳:6-SMD,无引线(DFN,LCC) 电流 - 电源(禁用)(最大值):- 标准包装:200
VTEUALJANF-153.600000 功能描述:153.6MHz CMOS VCXO Oscillator Surface Mount 3.3V 40mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:153.6MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源(最大值):40mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽(7.00mm x 5.00mm) 高度:0.075"(1.90mm) 封装/外壳:6-SMD,无引线(DFN,LCC) 电流 - 电源(禁用)(最大值):- 标准包装:200
VTEUALJANF-30.720000 功能描述:30.72MHz CMOS VCXO Oscillator Surface Mount 3.3V 20mA Enable/Disable 制造商:taitien 系列:VT 包装:剪切带(CT) 零件状态:新产品 类型:VCXO 频率:30.72MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源(最大值):20mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽(7.00mm x 5.00mm) 高度:0.075"(1.90mm) 封装/外壳:6-SMD,无引线(DFN,LCC) 电流 - 电源(禁用)(最大值):- 标准包装:1